深圳市国宇航芯科技有限公司
FBGA , 模数转换器 , 放大器
AD9253TCPZ-125EP北京IC
发布时间:2018-08-06

AD9253TCPZ-125EP  订货黄小姐微信同号

AD9253TCPZ-125EP The AD9253-EP is a quad, 14-bit, 125 MSPS analog-to-digital

converter (ADC) with an on-chip, sample-and-hold circuit

designed for low cost, low power, small size, and ease of use.

The product operates at a conversion rate of up to 125 MSPS

and is optimized for outstanding dynamic performance and

low power in applications where a small package size is critical.

The ADC requires a single 1.8 V power supply and LVPECL-/

CMOS-/LVDS-compatible sample rate clock for full performance

operation. No external reference or driver components are required

for many applications.

The ADC automatically multiplies the sample rate clock for the

appropriate LVDS serial data rate. A data clock output (DCO) for

capturing data on the output and a frame clock output (FCO)

for signaling a new output byte are provided. Individual channel

power-down is supported and typically consumes less than 2 mW

when all channels are disabled. The ADC contains several features

FUNCTIONAL BLOCK DIAGRAM

AD9253TCPZ-125EPFigure 1.

designed to maximize flexibility and minimize system cost, such as

programmable output clock and data alignment and digital test

pattern generation. The available digital test patterns include

built-in deterministic and pseudorandom patterns, along with

custom user-defined test patterns entered via the serial port

interface (SPI).

The AD9253-EP is available in a RoHS-compliant, 48-lead LFCSP

and is specified over an extended temperature range of −55°C to

+125°C. This product is protected by a U.S. patent. Additional

application and technical information can be found in the AD9253

data sheet.

AD9253TCPZ-125EPPRODUCT HIGHLIGHTS

1. Small Footprint. Four ADCs are contained in a small, spacesaving

package.

2. Low power of 110 mW/channel at 125 MSPS with scalable

power options.

3. Ease of Use. A DCO operates at fre of up to 500 MHz

and supports double data rate (DDR) operation.

4. User Flexibility. The SPI control offers a wide range of

flexible features to meet specific system requirements

AD9253-EP是一个四路、14位、125 MSPS的模数转换器。

具有片上采样保持电路的转换器(ADC)

设计成本低,功耗低,体积小,使用方便。

该产品的转换率高达125 MSPS。

并为突出的动态性能而优化。

低功耗的应用中,小封装尺寸是至关重要的。

ADC需要一个单一的1.8伏电源和LVPECL -。

CMOS / LVDS兼容采样率时钟

操作。不需要外部引用或驱动组件。

对于许多应用。

ADC自动将采样速率时钟乘以

适当的LVDS串行数据速率。数据时钟输出(DCO)

捕获输出和帧时钟输出(FCO)上的数据

对于信令,提供新的输出字节。个别渠道

功率下降是支持的,通常消耗小于2毫瓦。

当所有通道被禁用时。ADC包含几个特性

功能框图

图1。

设计Zui大化灵活性和Zui小化系统成本,如

可编程输出时钟与数据对齐及数字测试

模式生成。可用的数字测试模式包括

内置确定性和伪随机模式,以及

通过串口输入自定义的用户定义的测试模式

接口(SPI)。

AD9253TCPZ-125EP产品亮点

1。占地面积小。四个ADC包含在一个小型的太空舱中。

包裹。

2。低功耗110兆瓦/通道在125 MSPS的可扩展性

电源选项。

三。易用性。DCO工作在高达500 MHz的频率。

并支持双数据速率(DDR)操作。

4。用户灵活性。SPI控制提供了广泛的

满足特定系统要求的灵活特性


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